/********************************************************************************************************
 * @file	timer_reg.h
 *
 * @brief	This is the header file for B91
 *
 * @author	Driver Group
 * @date	2019
 *
 * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
 *          All rights reserved.
 *
 *          Redistribution and use in source and binary forms, with or without
 *          modification, are permitted provided that the following conditions are met:
 *
 *              1. Redistributions of source code must retain the above copyright
 *              notice, this list of conditions and the following disclaimer.
 *
 *              2. Unless for usage inside a TELINK integrated circuit, redistributions
 *              in binary form must reproduce the above copyright notice, this list of
 *              conditions and the following disclaimer in the documentation and/or other
 *              materials provided with the distribution.
 *
 *              3. Neither the name of TELINK, nor the names of its contributors may be
 *              used to endorse or promote products derived from this software without
 *              specific prior written permission.
 *
 *              4. This software, with or without modification, must only be used with a
 *              TELINK integrated circuit. All other usages are subject to written permission
 *              from TELINK and different commercial license may apply.
 *
 *              5. Licensee shall be solely responsible for any claim to the extent arising out of or
 *              relating to such deletion(s), modification(s) or alteration(s).
 *
 *          THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 *          ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 *          WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 *          DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
 *          DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 *          (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 *          LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 *          ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *          (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *          SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *******************************************************************************************************/
#ifndef TIMER_REG_H
#define TIMER_REG_H
#include "../sys.h"

/*******************************      timer registers: 0x140140     ******************************/
#define reg_tmr_ctrl0			REG_ADDR8(0x140140)
#define reg_tmr_ctrl16			REG_ADDR16(0x140140)
#define reg_tmr_ctrl32			REG_ADDR32(0x140140)
enum{
	FLD_TMR0_MODE =				BIT_RNG(0,1),
	FLD_TMR0_EN =				BIT(2),
	FLD_TMR0_NOWRAP = 			BIT(3),
	FLD_TMR1_MODE =				BIT_RNG(4,5),
	FLD_TMR1_EN =				BIT(6),
	FLD_TMR1_NOWRAP  = 			BIT(7),
};

#define reg_tmr_ctrl2			REG_ADDR8(0x140142)

enum{
	FLD_TMR_WD_EN =				BIT(7),
};

#define reg_tmr_sta				REG_ADDR8(0x140143)
enum{
	FLD_TMR_STA_TMR0   =		BIT(0),
	FLD_TMR_STA_TMR1   =		BIT(1),
	FLD_TMR_STA_WD     =		BIT(2),
	FLD_TMR_WD_CNT_CLR =		BIT(3),
	FLD_TMR_SW_IRQ     =		BIT(7),
};

#define  reg_tmr0_capt          REG_ADDR32(0x140144)
#define  reg_tmr1_capt          REG_ADDR32(0x140148)
#define  reg_tmr_capt(i)		REG_ADDR32(0x140144 + ((i) << 2))

#define  reg_wt_target0         REG_ADDR8(0x14014c)// always is 0x00
#define  reg_wt_target1         REG_ADDR8(0x14014d)
#define  reg_wt_target2         REG_ADDR8(0x14014e)
#define  reg_wt_target3         REG_ADDR8(0x14014f)
#define  reg_wt_target          REG_ADDR32(0x14014c)


#define reg_tmr0_tick			REG_ADDR32(0X140150)
#define reg_tmr1_tick			REG_ADDR32(0X140154)
#define reg_tmr_tick(i)			REG_ADDR32(0X140150 + ((i) << 2))

#endif
